This invention relates to polishing methods and apparatus and more particularly, to such methods and apparatus for accurately polishing wafers of semiconductor material with high throughput and in a manner compatible with semiconductor processing clean room environments.
The production of integrated circuits begins with the creation of high quality semiconductor wafers. Each wafer is of relatively high cost due to the detailed processing needed to produce it. During the integrated circuit production process, an extremely flat surface is desired on at least one face of the wafer. Wafer polishing to achieve such a flat surface is a known technique.
Such polishing generally includes attaching one side of the wafer to a flat surface of a wafer carrier or chuck and pressing the wafer against a flat polishing surface. The polishing surface is moved under the wafer, and the wafer may also be rotated about its vertical axis and oscillated back and forth to improve polishing action. The polishing surface is generally a pad attached to a rigid flat table which is rotated to provide movement and onto which an abrasive and/or chemical slurry is pumped. The joint functions of the pad, the slurry, and the relative movements of the components produces a combined mechanical and chemical process at the wafer surface which produces a highly flat surface on a wafer where surface variations are kept to less than, for example, 0.5 xcexcm.
Polishing has typically been performed prior to integrated circuit fabrication so that a flat surface is available on the semiconductor wafer on which the circuit fabrication can take place. As integrated circuits increase in complexity, the conductive line widths have reduced considerably, making the focus and depth of field of the imaging process more sensitive to surface variations on the substrate. This has increased the desire for wafers with improved surfaces. Further during the integrated circuit fabrication process, layers of, for example, conductors and dielectrics, are built up on the wafer, on top of which other such layers are to be created. Thus, it has become necessary to xe2x80x9cre-flattenxe2x80x9d the wafer surface during the actual fabrication of the integrated circuit and not merely before it. The act of re-flattening is referred to as planarization. At each successive one of several planarization operations the wafer is considerably more valuable. Given semiconductor processing costs, it is quite possible that a single 8xe2x80x3 partially processed wafer is worth $10,000 or more when planarization is performed. Great care in handling of each such wafer is obviously required.
Speed of wafer polishing has always been of interest but has become more important when planarization is one of the necessary sequential processing steps. Prior arrangements, typically, polish one or two wafers, with substantial waiting time to load and unload wafers. Methods and apparatus are needed to speed up the polisher process.
The increase in value of the wafers being polished has greatly increased the need for precision in the planarization process. Improper polishing of a wafer worth $100 is a completely different matter than improperly polishing one worth $10,000. Methods and apparatus are needed to provide improved polishing, particularly in a rapid production environment.
These needs are met by the present invention.
Wafer polishing apparatus in accordance with the present invention comprises a polishing assembly having a plurality of wafer carriers for substantially simultaneously engaging a plurality of wafers of material with a polishing surface. The apparatus includes an index table for holding wafers to be polished, and positioning apparatus to move the polishing assembly between the polishing surface and the index table. At the index table, all wafer carriers of the polishing assembly are substantially simultaneously loaded with wafers. After loading the carriers, the polishing assembly is positioned in polishing engagement with the polishing surface. By incorporating an index table into the apparatus, unpolished wafers can be loaded onto the index table in preparation for loading them simultaneously onto the wafer carriers, providing throughput advantages.
The index table indexed in increments when being loaded with unpolished wafers so that the wafers can be placed thereon one at a time, as retrieved from a multi-wafer cassette. The movement of unpolished wafers to the load cups advantageously occurs while the polishing assembly is at a polish position polishing another plurality of wafers. Upon completion of polishing, the assembly returns to the index table to receive substantially simultaneously another set of wafers to be polished.
The index table may also comprise a plurality of unload cups which are used in a similar manner to the load cups to substantially simultaneously removed polished wafers from the wafer carriers after being polished. The removal of polished wafers from the unload cups can then be performed while other wafers are being polished by the polishing assembly.
The alignment of polish assembly, index table and polishing surface is maintained by providing a stable framework in the apparatus. To this end, a linear track for moving the polishing assembly extends between the polishing surface and the index table. The linear track provides a stable, rugged frame while permitting controlled movement of the polishing assembly between the index table and the polishing surface.
The apparatus may also include an automatic arrangement for washing each wafer as it is removed from the index table. Such washing assures that the polished wafers removed from the apparatus are suitable for a clean room environment.
The apparatus is controlled by a computer which processes many separate feedback loops to maintain the accuracy of operations. For example, polishing pressure is applied at each wafer carrier by an air cylinder and applied pressure is sensed by a pressure sensor of each wafer carrier. Oscillation and rotation of each wafer carrier is provided by separate servo motors, the position and rotation rate of which is also sensed. Ranges of values for desired pressure and wafer carrier motion are established based on operator input. The computer then reads actual operating parameters measured by the sensors and adjusts the air pressure and servo motor motion to keep the actual parameters within the desired ranges.
The operator enters data indicative of operating parameters for each of the wafer carriers being used. These parameters then form the basis of the desired ranges which are separately stored in the computer. Advantageously, the operator can establish the same or different parameters for each wafer carrier. Since each wafer carrier is controlled by the computer in accordance with variables stored for that wafer carrier, the apparatus can differently process wafers on separate wafer carriers.
Each wafer carrier of the preferred embodiment includes an upper force conveying member having a central axis for conveying pressure forces along the central axis and rotational forces about that central axis. A polishing member of the wafer carrier comprises a flat lower surface having a polishing axis. Pressure forces are coupled between the force conveying member and the polishing member by a force coupling member including a first race member symmetrically disposed about the central axis of the force conveying member, a second race member symmetrically disposed about the polishing axis of the wafer carrier, and ball bearings held between the first and second race members. The first race member, the ball bearings, and the second race member cooperate to focus pressure forces through the force coupling member to a point on the polishing axis. Further, rotational forces are conveyed by a plurality of cam followers disposed about the periphery of the force conveying member which abut bearing surfaces on the polishing member, to couple rotational forces. After the force conveying member is inserted into a cylindrical opening in the polishing member, it is held in place resiliently by a collar which includes a plurality of springs for holding the force conveying member in the cylindrical opening of the polishing member, to maintain pressure on the ball bearings.
A lower flat surface of the polishing member includes a plurality of holes therethrough which communicate with a central passage into the force conveying member. This hollow passage is sealed by flexible means to permit relative motion of the polishing member and the force conveying member, while providing a substantially fluid-tight communication channel.
The polishing member also includes a lip around its polishing surface to provide additional support for wafers carried thereby. In the preferred embodiment, the lip comprises a ring of material having threads on an inner surface thereof, which engage with threads around the outer surface of the polishing member. The height of the resulting lip can be carefully adjusted by controlling the depth to which the threads of the ring and the polishing member are engaged. Advantageously, a collar is applied over the ring, which collar frictionally engages the ring to keep it from rotating and becoming misadjusted.